The need to transmit more data at higher speeds is changing system design. Today, interconnect technology has morphed to meet the need for speed.
The continuous growth in IP services and access speeds has led to exponential growth in bandwidth demand, driving the need for higher-speed interfaces in routers and switches. That, in turn, has led to the development of new interconnect technology and new standards for 40Gb/s and 100Gb/s interfaces, and plans for 400Gb/s speeds are now materializing; there will be no rest for connector designers.
Transmission of More Data at Higher Speed
The need to transmit more data at higher speeds is changing system design. New strategies include developing connectors with features and capabilities specifically for high-speed operations, maintaining signal integrity at high speeds, and using new protocols.
For example, it’s becoming apparent that PAM4 (four-level pulse amplitude modulation) will play a growing role in this transition. NRZ (non-return-to-zero) signaling, an industry standard, is giving way to PAM4 modulation in many applications due to PAM4’s ability to process data rates of 56Gb/s, 100Gb/s, and higher.
While PAM4 does offer important speed improvements over NRZ, its downside is that data must be encoded prior to transmission then de-encoded when received. This requires additional processing capability, making PAM4 more challenging to implement. Still, where high speeds are critical, the additional capability of PAM4 balances out the higher processing costs.
At the same time, it’s important to keep in mind that NRZ is still appropriate for certain high-speed applications. Indeed, new backplane connectors can provide data rates above 50Gb/s in both PAM4 and NRZ systems. Compared to in-line beams, these backplanes optimize signal integrity performance and improve insertion loss, enabling interface resonance frequency that exceeds 30GHz. They also deliver enhanced signal integrity by optimizing geometries and differential shielding that minimize impedance discontinuities and reduce crosstalk.
Meeting New Challenges in the World of Interconnects
When speeds increase, traditional connector challenges are magnified. For example, higher-data-speed channels typically involve increased electromagnetic interference, higher crosstalk, and impedance discontinuities, so protection against these issues must be designed in. Also, the connectors described above typically have to work with existing headers (ensuring backwards compatibility), enabling integration into existing designs. For example, if only the daughtercard is enhanced, the same headers can be used.
Another issue with increased system speeds is maintaining appropriate signal integrity. One way to accomplish this is to remove high-speed signals from the PCB by applying high-speed copper cable. This alternative can be used with both 50Gb/s NRZ and 50Gb/s PAM4 live encoded serial traffic using QSFP cable assemblies and connector interfaces.
Tools to Expedite Design of Modern Interconnects
With new designs required for high-speed connectors, tools that can reduce the time required to simulate system design are welcome. In traditional manual system simulation, each component is simulated independently. That means it can take a week or more to simulate individual system designs. When multiple design iterations are required, this can slow the design process down to a crawl.
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