Sometimes a small error has a great influence. In the following a capacitance falsify a measurement signal. The test engineers need to ensure that they have high confidence that the solution is robust.
Sometimes a test engineer working in a semiconductor foundry has to design a circuit for test that is not always feasible for the end application due to small things such as capacitance. It is not uncommon for test development engineers to be asked, “Why do you want to test continuity?”, or to be told, “You don’t need that relay.” In general, however, test development engineers need to abide by production and quality assurance rules.
In the example described below, ams was required to test a very simple video signal on a foundry customers IC, measuring each individual pixel voltage of a 640 x 480 image sensor device. The main requirement for the board design was that the signal path from the video output port should not exceed 20 pF, as specified by the customer. To be able to measure the signal correctly, the test engineers needed to use the LTX-Credence DIG-HSB tester. Unfortunately, this instrument has a 50 ohm input termination and the device would not be able to source the required current for this. The solution is to use a high-speed buffer that is available in-house. The specification for the input capacitance of the high speed buffer is 7,5 pF.
When all pins of the IC have to be tested
Quality assurance always requires continuity to be tested on all pins of the IC, however complicated, and in this instance it was very complicated. By adding the ability to test continuity on this particular pin ams needed to add some form of switch. Some relays have no specification for capacitance as it can be quite high, so to reduce the signal path capacitance as much as possible ams opted for an in-house RF relay.
The capacitance for this relay is specified at 0,2 pF with closed contacts. With all the major contributors of capacitance added up, the total capacitance of the signal path was estimated at less than 15 pF – lower than the 20 pF required in the customers test specification. The image 1 shows the final schematic of the test circuit. So when the final silicon arrived from fabrication, debugging began.
The main test required measurement of each individual pixel voltage coming from the sensor (image 2), and then calculation of the standard deviation of the voltage across the whole array. If the standard deviation across the array is too high then the device would be binned as a bad die. The initial results looked promising, so the test team quickly went into correlation mode.
All the results were far too good
After the first correlation, it became apparent that there was something very wrong, as the results from the tester couldn’t be valid: all the results were far too good. For the same device it was seen that there was a three-fold difference in the results measured at the foundry compared to those measured at the customer (image 3) – an unacceptable variance.
After many investigations into the device set-up, it was concluded that the only place left to investigate was at the test hardware itself. Having spoken to the customer and looking in more depth at the schematic of its IC, it was seen that the only major difference in the hardware was the op amp used for buffering. Comparison of the buffers showed that there was a big difference between the input capacitance of the buffer used by the customer and that used by the ams foundry.
The op amp used by the customer had a 1 pF input capacitance as opposed to the 7 pF capacitance of the op amp. Investigating further, the decision was to swap the buffer, but the pin-out of the customers buffer was different from that of the ams buffer. In inventory we found an op amp with a similar input capacitance and the same pin-out. Once this new op amp was installed on the board, the results correlated with the customers. It therefore seemed that the customers original specification – of a maximum 20 pF capacitance – was not correct: in fact, the input capacitance of the buffer caused a filtering effect on the signal, lowering the standard deviation.
The solution is robust and shows good correlation
Observing the captured signal using the new op amp, the signal is clearly noisier due to the reduction in filtering by the input capacitance (image 4). Then ams re-started the correlation exercise, with much improved results (image 5). If great care is not taken with hardware specifications, then a simple error can lead to better results than expected. The test engineers need to ensure that, when releasing a test program, they have high confidence that the solution is robust and shows good correlation. With a close co-operation between all parties involved, such problems can be avoided and a solid and trustworthy test solution can be achieved.
ams can be found at electronica 2014 in Hall A5 Booth 107
* Peter Sarson is test engineering manager and Andreas Wild is Full Service Foundry Marketing Manager at ams in Austria.