Highly Integrated Chips: Super-Brains for the IoT Age
Electronic devices are becoming continually smaller, more flat and multifunctional and their “inner life”, the microelectronic systems, along with them – thanks to 3D integration.
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Further miniaturization of electronic devices would not be possible without key technologies like 3D integration. The ability to interconnect heterogeneous components into one single microelectronic system is becoming even more crucial now: It enables highly integrated, smart sensor systems needed e.g. for the Internet of things.
Many of today’s chips show such complex functionalities that they could also be considered as mini-computers: ultra-miniaturized electronic “brains” – following the big European research project “e-Brains” (www.e-brains.org) which are also equipped with sensors, the “sense organs” of things. This is enabled by technologies like high-performant 3D integration, where heterogeneous microelectronic components are stacked on top of one another and connected by electrical through-via-wiring into a highly integrated microelectronic system.
As Peter Ramm and his team from the Fraunhofer Research Institution for Microsystems and Solid State Technologies EMFT started their research activities on 3D integration of microelectronic systems 30 years ago, they were considered as exotics. Meanwhile, this has changed dramatically: 3D integration is established as a key technology to make microelectronic systems smaller, at the same time increasing their performance. The principle of 3D integration can be described very simply: The, in many cases heterogeneous, components of a chip are stacked on top of one another and vertically connected by electrical through via wiring to a single circuit (IC).
Evolutionary Process Since the 80's
From its beginning in the 80´s until today the technology has gone through a big evolutionary process. Basically four different bonding technologies have been established since then – Peter Ramm’s Munich team – especially Armin Klumpp and Josef Weber – conducting pioneer work in the field of 3D integration and deploying all of them.
In the beginning of the 90´s, the Fraunhofer researchers started to use the so-called dielectric bonding. Thereby the wafers are mechanically connected through an oxide layer. The vertical electric through-via-wirings (Through Silicon Vias, TSV) are implemented in a further step. The problem with this method are the comparatively high bonding temperatures, which have a negative impact on lifetime and reliability of the device. “Ideally the bonding temperature should not be much higher than the temperatures the device will be exposed to when it is in use”, Peter Ramm says. One alternative is the method of adhesive bonding, where the substrates are connected with the help of an adhesive. Although this method requires only relatively low temperatures, it has disadvantages as well: The TSVs have to be etched through the complete stacked assembly, including the adhesion layer, and filled with a metallic compound – a complex and expensive procedure.
A real “milestone” was set with the development and application of metal bonding: This method uses the fact that some metal systems like copper-copper or copper-tin are very suitable to connect wafers in a robust and high-quality way. “But the real key feature is that the components can be connected mechanically as well as electrically in one step. This allows for a very simple 3D integration of the chips, using cost-efficient wafer processes”, says Peter Ramm.
Thus, the time-consuming and costly procedure of through-contacting the wafer stacks is no longer required. Based on the metal bonding method, Fraunhofer EMFT researchers developed the so-called SLID-bonding (solid-liquid interdiffusion) in cooperation with colleagues from Infineon. In this technology a low-melting solder layer between two high-melting metals is heated up above its melting point, causing the atoms of the higher melting metal layer, which is still solid at the bonding temperature (e.g. copper), to diffuse into the liquid metal (e.g. tin) and both layers to connect to an intermetallic compound (e.g. Cu3Sn). The melting point of this compound is at much higher temperatures than the bonding temperature. This guarantees a high mechanical stability of the systems.
The usual bonding temperature with this method is about 300 °C. “We extended this method by including an ultrasound procedure to lower the process temperatures down to 200 °C”, explains Peter Ramm. In a patented method, the SLID technology was combined with the TSV concept and further developed to a high-performant and cost-efficient 3D-TSV technology. This allows for integration densities of millions of contacts per square centimeter. Based on this 3D technology, the researchers developed e.g. a miniaturized and wireless communicating tire pressure sensor in cooperation with the partners Infineon, Sensonor and SINTEF.
Hybrid Memory Cubes and Smart Sensor Systems
The high requirements on performance in some new IoT applications require even higher integration densities. In order to progress in this market segment, Fraunhofer EMFT signed a license agreement with XPERI Corp. in September 2016 and integrated two of the currently most advanced 3D integration technologies into its service portfolio: ZiBond und DBI (Direct Bond Interconnect). Both technologies can be carried out at comparatively low bonding temperatures of below 200 °C. “After all, DBI realizes a vision that had been discussed already 20 years ago – but it was considered as unrealizable that time: A kind of “hybrid” between dielectric bonding and metal bonding”, remembers Peter Ramm.
Within DBI technology, the components are connected both mechanically and electrically after sophisticated surface pretreatment of the deposited copper and oxide layers. Thus the complex through-plating procedure is no longer required, which allows for manufacturing the systems in a cost-effective manner – a basic requirement for access to mass markets such as consumer electronics.
This technology also enables “pitches” (structural width and clearance between the joints) of only 2 μm, thus allowing for highly integrated chip-stacks with enormous performance. This is of great interest for high-performance applications like processors: A current trend in this field deals with so-called memory cubes – where memory and processor are integrated in one 3D stack.
Particularly in the European research landscape there is another current tendency in the field of 3D integration: Smart Sensor Systems for IoT applications where sensors and electronics are integrated into one 3D system. This allows for processing huge data volumes already on the system level – before transmission to the Cloud. This approach could gain importance in the future: In case the number of connected devices will grow as tremendously as predicted in the Internet of Things vision, the “data highways” will be overcrowded very soon. More than that, the private data security increases significantly if the data processing is perfomed already within the sensor system, independent from the Cloud.
The challenge to realize such complex 3D systems lies mainly in the heterogeneity of the components – typically at least one sensor, one IC for data processing and one IC for data transmission. “In this field the new low temperature processes are the key to realize robust heterogeneous sensor systems with high performance and reliability”, says Peter Ramm.